Teradyne and Teseda Providing
Time-to-Market and Yield Enhancement Solutions for the UltraFLEX and
J750 Test Platforms
NORTH READING, MA – October 28, 2008 – Teradyne (NYSE: TER) today announced
their decision to collaborate with Teseda on an integration of the IG-XL™
programming environment with Teseda’s Diagnostic Manager Series toolset
and WorkBench™ (TWB) software. As a result, customers will achieve an
expanded capability to perform silicon debug, failure analysis and yield
learning on Teradyne test platforms with a resulting decrease in time-to-market
and improvement in profitability.
The Teseda toolset will utilize real-time results from the tester,
along with design hierarchy, scan-chain structures and diagnostic information
generated by DFT tools from major EDA vendors, to diagnose scan failures
down to the gate and cell level. The goal of this new partnership is
to allow Teradyne customers to perform these functions directly on
the UltraFLEX™ or J750 platform in either a laboratory or production
setting, using the same applications hardware and test program that
will be deployed for volume production. The testers will collect results
from volume production runs that will be used by Teseda’s toolset to
identify areas of the circuit design that are sensitive to fabrication
errors at smaller device geometries in order to improve overall yield.
“This partnership with Teseda significantly augments our existing
relationships in the EDA space by adding more interactive tools for
silicon diagnosis and yield learning directly onto the UltraFLEX and
J750,” said Greg Smith, manager of Teradyne’s Broadband and Computing
business unit. “Developing partnerships with independent IP providers
such as Teseda is the key to providing the most flexible EDA integration
strategy possible for our customers. We will also leverage the value-added
capabilities of Teradyne’s and Teseda’s field engineering teams to
adapt core IP to the specific needs of target customers. “
“As the leading ATE supplier in the SOC space, Teradyne provides
significant new opportunities for Teseda to expand its market reach,
especially since they provide a common hardware platform for silicon
debug and high volume production,” said Armagan Akar, president and
CEO of Teseda. “We believe this supports our current hardware and software
product offerings by providing important new outlets in Teradyne’s
existing customer base.”
About the UltraFLEX and J750
UltraFLEX delivers the power and precision needed for testing
advanced microprocessors, PC chipsets and graphics, disk drives, video
game devices, System-On-a-Chip (SOC) or System-in-Package (SIP), memory,
baseband digital, network, and broadband devices. UltraFLEX offers
a wide range of coverage when the device mix and throughput goals
demand the highest speed, precision, coverage and capacity for unprecedented
multisite test efficiency.
Teradyne’s J750 platform revolutionized ATE with its economical parallel
testing and compact “tester-in-a-test-head” design. With more than
2,800 systems installed worldwide, the J750 has become one of the most
successful platforms in ATE history. The J750’s new Ex instrumentation
delivers even more test performance with 200 MHz/550 Mbps digital,
a 24-channel high density VI, digital signal source and capture behind
each pin, and 196 Gbit SCAN depth.
About Teradyne
Teradyne (NYSE:TER) is a leading supplier of Automatic Test
Equipment used to test complex electronics used in the consumer electronics,
automotive, computing, telecommunications, and aerospace and defense
industries. In 2007, Teradyne had sales of $1.1 billion and currently
employs about 3,600 people worldwide. For more information, visit www.teradyne.com.
Teradyne® is a registered trademark of Teradyne, Inc. in the U.S. and
other countries. All product names are trademarks of Teradyne, Inc.
(including its subsidiaries).
Media Contact:
Teseda
Joan Frazer
503-245-3104
joan@nlmarketing.com
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